1. Field of the Invention
Generally, the present disclosure relates to the manufacture of sophisticated semiconductor devices, and, more specifically, to reticles that are employed in photolithography systems to form patterned mask layers for use in ion implantation processes, and to the use of such reticles in performing any of a variety of ion implantation processes that are routinely performed in semiconductor manufacturing operations.
2. Description of the Related Art
The fabrication of advanced integrated circuits, such as CPU's, storage devices, ASIC's (application specific integrated circuits) and the like, requires the formation of a large number of circuit elements, such as a transistor, in a given chip area or die according to a specified circuit layout. In general, integrated circuit devices are formed by performing a number of process operations in a detailed sequence or process flow. Such process operations typically include deposition, etching, ion implantation, photolithography and heating processes that are performed in a very detailed sequence to produce the final integrated circuit device. These processes are continued until such time as the integrated circuit device is complete.
A typical photolithography process generally involves the steps of: (1) applying a layer of photoresist above a wafer, typically accomplished by a spin-coating process; (2) pre-baking (or soft-baking) the layer of photoresist at a temperature of approximately 90-120° C. to reduce the level of solvents in the layer of photoresist and to improve the adhesion characteristics of the photoresist; (3) performing an exposure process, wherein a pattern on a reticle is projected onto the layer of photoresist used in a stepper tool to create a latent image in the layer of photoresist; (4) performing a post-exposure bake on the layer of photoresist at a temperature approximately 5-15° C. higher than the pre-bake process; (5) performing a develop process to turn the latent image in the layer of photoresist into the final resist image; and (6) performing a post-bake process (or hard-bake) at a temperature of approximately 125-160° C. to remove residual solids and to improve adhesion of the patterned photoresist mask. These process steps are well known to those skilled in the art and, thus, will not be described herein in any greater detail.
Photolithography tools and systems typically include a source of radiation at a desired wavelength, an optical system and, typically, the use of a so-called mask or reticle that contains a pattern that is desired to be formed on a wafer. Radiation is provided through or reflected off the mask or reticle to form an image on a semiconductor wafer. The radiation used in such systems can be light, such as ultraviolet light, deep ultraviolet light (DUV), vacuum ultraviolet light (VUV), extreme ultraviolet light (EUV), etc. The radiation can also be x-ray radiation, e-beam radiation, etc. Generally, the image on the reticle is utilized to irradiate a light-sensitive layer of material, such as photoresist material. Ultimately, the irradiated layer of photoresist material is developed to define a patterned mask layer using known techniques. Ultimately, the patterned mask layer can be utilized to define doping regions, deposition regions, etching regions or other structures associated with an integrated circuit. Currently, most of the photolithography systems employed in semiconductor manufacturing operations are so-called deep ultraviolet systems (DUV) that generate radiation at a wavelength of 248 nm or 193 nm. However, the capabilities and limits of traditional DUV photolithography systems are being tested as device dimensions continue to shrink. This has led to the development of a so-called EUV system that uses radiation with a wavelength less than 20 nm, e.g., 13.5 nm.
In one example, photolithography tools and techniques may be employed to form a patterned implant mask layer comprised of a photoresist material above a semiconducting substrate or a layer of material. The patterned implant mask exposes portions of the substrate or the layer of material where it is desired to implant various dopant materials. In general, in photolithography operations, the pattern desired to be formed on the underlying layer of material is initially formed on a reticle. Thereafter, using an appropriate stepper tool and known photolithographic techniques, the image on the reticle is transferred to the layer of photoresist. Then, the layer of photoresist is “developed” so as to leave in place a patterned layer of photoresist substantially corresponding to the pattern on the reticle. This patterned layer of photoresist is then used as a mask in subsequent ion implant processes. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features or opening-type features, that are to be replicated in an underlying process layer.
With reference to FIGS. 1A-1D, one illustrative prior art technique for removing an ion implant mask will be discussed. As shown in FIG. 1A, a patterned implant mask 12 is formed above a substrate 10. A plurality of illustrative features 12F, e.g., line-type features, are defined in the patterned implant mask 12. The patterned implant mask 12 may be formed using traditional photolithography tools and techniques. The implant mask 12 covers portions of the substrate 10 while leaving other portions of the substrate 10 exposed.
FIG. 1B depicts the device after an ion implantation process has been performed to introduce dopant materials, e.g., N-type or P-type dopant materials, into the substrate 10 and thereby form illustrative doped regions 16. The implanted dopant materials typically define doped regions, such as N-wells, P-wells, halo regions, source/drain regions, etc., and the implant process may be performed at a near vertical implant angle or it may be a tilted implant process, depending on the particular application.
With continuing reference to FIG. 1B, the implant process results in the formation of a relatively hard “crust” layer 14 on the features 12F of the patterned implant mask 12. The crust layer 14T on the top of the features 12F of the implant mask 12 is typically thicker than the crust layer 14S on the sidewalls of the features 12F of the implant mask 12. For example, in some applications, the side crust layer 14S may be approximately one-half of the thickness of the top crust layer 14T.
Obviously, after the desired dopants are implanted into the substrate 10 through the patterned implant mask 12, the implant mask 12 must be removed. Removal of such an implant mask can be time consuming and problematic in many respects. One illustrative prior art process for removing such an implant mask 12 involves performing a brief plasma ashing process followed by performing a wet etching process. More specifically, a brief, e.g., approximately 30 seconds, plasma ashing process is performed to “break through” the relatively thinner side crust layer 14S. FIG. 1C depicts the patterned mask layer 12 after this plasma ashing process has been performed. Thereafter, as shown in FIG. 1D, an etching process using, for example, a sulfuric acid/peroxide mixture is performed to effectively attack the now-exposed resist material and “lift” the remaining portions of the patterned implant mask layer 12, including the top crust layer 14T. Attempts to remove the entirety of the crust layer 14T by extending the duration of the plasma ashing process have been unsuccessful. More specifically, even in cases where the plasma ashing process has been performed for an extended duration, e.g., about 10 minutes or so, the net result has been the formation of an undesirable Teflon-like material on the surface of the substrate 10, which cannot be easily removed by subsequent etching or cleaning processes using, for example, a sulfuric acid/peroxide mixture.
Another problem associated with implant masks and their removal will now be discussed with reference to FIG. 2A. FIG. 2A depicts an illustrative semiconductor substrate 20, e.g., a silicon wafer with a plurality of functional die 22 and incomplete die 24 formed above the substrate 20. It varies depending upon the particular application, but 200-400 individual die may be formed on a typical wafer. The incomplete die 24 are incomplete in the sense that the edge 20E of the substrate 20 passes through the incomplete die 24. Typically, the same process operations are performed on the incomplete die 24 as are performed on the functional die 22, e.g., gate structures are formed on both the incomplete die 24 and on the functional die 22, in an effort to insure processing uniformity across the wafer 20.
To form a patterned implant mask above the substrate 20, the substrate 20 is initially coated with a resist material (not shown) and thereafter, as noted above, portions of the resist material are irradiated with a light source to change the chemical characteristics of the resist material. In modern semiconductor manufacturing operations, the exposure process is performed in sophisticated photolithography tools referred to as “steppers.” In such a stepper tool, light is directed through or off of a reticle to transfer the pattern on the reticle to the layer of photoresist material. Each “flash” in the stepper exposes a set number of die on the wafer. The number of die exposed in any particular “flash field” may vary depending upon the particular application. For example, steppers may employ a “2×2” flash field, a “2×3” flash field, etc. In a 2×2 flash field, four die are exposed in each “flash” in the stepper. The stepper exposes the entire layer of photoresist on a flash-by-flash basis. That is, after the first flash is performed to expose four die, the wafer is moved relative to the light source, and a second flash is performed to expose another four die. This process is performed until such time as the entire layer of photoresist is exposed. Thereafter, the “exposed” layer of photoresist is “developed” to remove the exposed portions of the photoresist material. The developed layer of photoresist is then subjected to the “hard bake” heating process mentioned above to complete the formation of the patterned implant mask layer 12.
With reference to FIG. 2A, illustrative 2×2 flash fields 26 are depicted. As mentioned above, even the photoresist material above the incomplete die 24 is exposed and developed. Focusing on a single die, a typical implant mask covers a very large percentage of the underlying die. Stated another way, very little of the underlying die is exposed in a typical implant mask. For example, in a typical implant mask, perhaps as little as 1-5% of the underlying die is exposed. Moreover, the portions of a typical patterned implant mask that are positioned above the incomplete die 24 represents unnecessary resist material that must eventually be removed, such as by performing the plasma ashing/wet etching process described above.
FIG. 2B depicts an illustrative prior art reticle 30 comprised of a body 31 having a center 32, which will be simultaneously irradiated in a single flash in a stepper tool. In this example, the reticle 30 is comprised of an arrangement of four illustrative patterns 34, each of which will ultimately be transferred to the portion of a layer of photoresist positioned above a single die. In the depicted example, the reticle 30 has an illustrative 2×2 pattern or flash-field, wherein the photoresist material above four individual die will be exposed in a single “flash.” The arrangement of the patterns 34 is centered relative to the center 32 of the body of the reticle 30.
The present disclosure is directed to various methods and devices that may avoid, or at least reduce, the effects of one or more of the problems identified above.